// Bits de https://bitbucket.org/ESkopal/tnkernal-microchip/src/9b79aa7b83a2/example/SimpleTest/hdwConfig-pic32MX795F512L.c

// SRS Select:
#pragma config FSRSSEL = PRIORITY_7         // SRS Priority 7

// Ethernet RMII/MII Enable:
//  #pragma config FMIIEN = OFF                 // RMII Enabled
//  #pragma config FMIIEN = ON                  // MII Enabled

// Ethernet I/O Pin Select:
//  #pragma config FETHIO = OFF                 // Alternate Ethernet I/O
//  #pragma config FETHIO = ON                  // Default Ethernet I/O

// CAN I/O Pin Select:
//  #pragma config FCANIO = OFF                 // Alternate CAN I/O
//  #pragma config FCANIO = ON                  // Default CAN I/O

// USB USID Selection:
    #pragma config FUSBIDIO = OFF               // Controlled by Port Function
//  #pragma config FUSBIDIO = ON                // Controlled by the USB Module

// USB VBUS ON Selection:
//  #pragma config FVBUSONIO = OFF              // Controlled by Port Function
//  #pragma config FVBUSONIO = ON               // Controlled by USB Module

// PLL Input Divider:
#pragma config FPLLIDIV = DIV_5             // 2x Divider

// PLL Multiplier:
#pragma config FPLLMUL = MUL_20            // 20x Multiplier

// USB PLL Input Divider:
#pragma config UPLLIDIV = DIV_2             // 2x Divider

// USB PLL Enable:
//#pragma config UPLLEN = ON                  // Enabled
#pragma config UPLLEN = OFF                 // Disabled and Bypassed

// System PLL Output Clock Divider:
#pragma config FPLLODIV = DIV_1             // PLL Divide by 1

// Oscillator Selection Bits:
  #pragma config FNOSC = PRI                  // Primary Osc (XT,HS,EC)
//#pragma config FNOSC = PRIPLL               // Primary Osc w/PLL (XT+,HS+,EC+PLL)

// Secondary Oscillator Enable:
#pragma config FSOSCEN = OFF                // Disabled
//  #pragma config FSOSCEN = ON                 // Enabled

// Internal/External Switch Over:
#pragma config IESO = OFF                   // Disabled

// Primary Oscillator Configuration:
//  #pragma config POSCMOD = EC                 // External clock mode
//  #pragma config POSCMOD = XT                 // XT osc mode
#pragma config POSCMOD = HS                 // HS osc mode
//  #pragma config POSCMOD = OFF                // Primary osc disabled

// CLKO Output Signal Active on the OSCO Pin:
#pragma config OSCIOFNC = OFF               // Disabled

// Peripheral Clock Divisor:
#pragma config FPBDIV = DIV_1               // Pb_Clk is Sys_Clk/1

// Clock Switching and Monitor Selection:
#pragma config FCKSM = CSDCMD               // Clock Switch Disable, FSCM Disabled

// Watchdog Timer Postscaler:
#pragma config WDTPS = PS1                  // 1:1

// Watchdog Timer Enable:
#pragma config FWDTEN = OFF                 // WDT Disabled (SWDTEN Bit Controls)

// Background Debugger Enable:
#ifdef __DEBUG
    #pragma config DEBUG = ON                   // Debugger is enabled
#else
    #pragma config DEBUG = OFF                  // Debugger is disabled
#endif

// ICE/ICD Comm Channel Select:
#pragma config ICESEL = ICS_PGx2            // ICE EMUC2/EMUD2 pins shared with PGC2/PGD2

//Program Flash Write Protect:
#pragma config PWP = OFF                    // Disable

// Boot Flash Write Protect bit:
#pragma config BWP = OFF                    // Protection Disabled
// Code Protect:
#pragma config CP = OFF                     // Protection Disabled